This invention relates to integrated metal-oxide-semiconductor (MOS) type capacitors; and more particularly to such a capacitor that is formed in an integrated circuit having at least one bipolar transistor and at least one ion implanted resistor.
Such capacitors are typically formed in an integrated cicuit employing only process steps that are required for forming the other integrated components. In this manner the number of steps required for forming the integrated circuit are minimized. It is well known that the quality of an integrated circuit tends to be degraded and the cost increases as the number of process steps required increases. For reasons that will be explained more fully, the conventional integrated MOS capacitor has an oxide layer that typically ranges in thickness from above 3000 to 6000 angstroms, and it overlies a semiconductor electrode of N-type conductivity when the crystal body is of P-type conductivity, as is almost always the case. The adjacent underlying semiconductor electrode being of N-type conductivity is partly responsible for the dielectric oxide layer being so thick. Thinner oxide layers are desirable to provide a high capacity per unit area of the integrated circuit surface. Many integrated circuits have employed the conventional MOS capacitors that occupied as much as a third of the total area.
It is therefore an object of this invention to provide an integrated MOS capacitor requiring significantly less circuit area than a conventional MOS capacitor having the same capacity value.
It is a further object of this invention to provide a small integrated MOS capacitor that can be formed by processes already required by the other of the integrated components, when such other components include at least one bipolar transistor and at least one ion implanted resistor.
It is yet a further object of this invention to provide an integrated MOS capacitor capable of being formed by routine process steps to a close capacity tolerance.